871 Posti di lavoro per Design Verification in Italia
Senior Design Verification Engineer
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Staff Design Verification Engineer
Inserito 2 giorni fa
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Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on LinkedIn and Twitter (X).
Staff Design Verification Engineer
The Data Center and Energy group develops leading-edge Power Conversion solutions for the Data Center. The group is seeking a Staff Verification Engineer who must have a proven track record of verifying complex mixed/digital signals ICs. The team handles verification of the products, which include digital signal processing data-paths, high-speed interfaces, and sub-systems controllers. Candidate will work with the latest verification methodologies on designs ranging from individual blocks to sub-system level verification.
JobResponsibilities:
- Verification of sub-systems using leading-edge verification methodologies.
- Experience with the development of verification plans and verification environments from scratch on multiple projects.
- Verification of blocks using System Verilog and UVM.
- Should have worked on scoreboard assertions, functional coverage, and formal verification, to reach verification goals
- Take complete ownership of a complex feature verification and mentor & guide junior verification engineers.
- Define and implement improvements in verification flow and methodology.
- Gate-level simulations and debugging at the sub-system level.
- Bachelor's or Master’s degree in Electronics Engineering with 8+ years of experience in digital design, of which at least 3 years in digital verification.
- Expertise in Verilog, System Verilog, UVM, object-oriented programming, scripting, and automation with Perl or Python.
- Firm understanding of constrained random functional verification, coverage, and assertions.
- Expertise in test plan development and development of verification environments from the ground up.
- Extensive experience with verification of complex blocks, regressions, and coverage closure.
- Experience with gate-level simulations and debugging.
- Excellent debugging, analytical, and problem-solving skills.
- Strong interpersonal, teamwork, and communication skills.
- Expected to be highly independent, proactive, and result-oriented to achieve verification goals.
- Knowledge of PMBus, SPI, OTP/MTP, and I2C protocols.
- Experience in technically mentoring and coaching junior engineers.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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Staff Design Verification Engineer
Inserito 5 giorni fa
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Job Description:About Analog Devices
Analog Devices, Inc. (NASDAQ:) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atand onand.
The Data Center and Energy group develops leading-edgePower Conversion solutions for the Data Center. The group is seeking a Staff Verification Engineer who must have a proven track record of verifying complex mixed/digital signals ICs. The team handles verification of the products, which include digital signal processing data-paths, high-speed interfaces, and sub-systems controllers. Candidate will work with the latest verification methodologies on designs ranging from individual blocks to sub-system level verification.
JobResponsibilities:
Verification of sub-systems using leading-edge verification methodologies.
Experience with the development of verification plans and verification environments from scratch on multiple projects.
Verification of blocks using System Verilog and UVM.
Should have worked on scoreboard assertions, functional coverage, and formal verification, to reach verification goals
Take complete ownership of a complex feature verification and mentor & guide junior verification engineers.
Define and implement improvements in verification flow and methodology.
Gate-level simulations and debugging at the sub-system level.
Job Requirements:
Bachelor's or Master’s degree in Electronics Engineering with 8+ years of experience in digital design, of which at least 3 years in digital verification.
Expertise in Verilog, System Verilog, UVM, object-oriented programming, scripting, and automation with Perl or Python.
Firm understanding of constrained random functional verification, coverage, and assertions.
Expertise in test plan development and development of verification environments from the ground up.
Extensive experience with verification of complex blocks, regressions, and coverage closure.
Experience with gate-level simulations and debugging.
Excellent debugging, analytical, and problem-solving skills.
Strong interpersonal, teamwork, and communication skills.
Expected to be highly independent, proactive, and result-oriented to achieve verification goals.
Preferred qualifications:
Knowledge of PMBus, SPI, OTP/MTP, and I2C protocols.
Experience in technically mentoring and coaching junior engineers.
#LI-CC1
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysAbout Analog Devices
Analog Devices, Inc. (NASDAQ:) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atand onand.
Staff Design Verification Engineer
The Data Center and Energy group develops leading-edgePower Conversion solutions for the Data Center. The group is seeking a Staff Verification Engineer who must have a proven track record of verifying complex mixed/digital signals ICs. The team handles verification of the products, which include digital signal processing data-paths, high-speed interfaces, and sub-systems controllers. Candidate will work with the latest verification methodologies on designs ranging from individual blocks to sub-system level verification.
JobResponsibilities:
Verification of sub-systems using leading-edge verification methodologies.
Experience with the development of verification plans and verification environments from scratch on multiple projects.
Verification of blocks using System Verilog and UVM.
Should have worked on scoreboard assertions, functional coverage, and formal verification, to reach verification goals
Take complete ownership of a complex feature verification and mentor & guide junior verification engineers.
Define and implement improvements in verification flow and methodology.
Gate-level simulations and debugging at the sub-system level.
Job Requirements:
Bachelor's or Master’s degree in Electronics Engineering with 8+ years of experience in digital design, of which at least 3 years in digital verification.
Expertise in Verilog, System Verilog, UVM, object-oriented programming, scripting, and automation with Perl or Python.
Firm understanding of constrained random functional verification, coverage, and assertions.
Expertise in test plan development and development of verification environments from the ground up.
Extensive experience with verification of complex blocks, regressions, and coverage closure.
Experience with gate-level simulations and debugging.
Excellent debugging, analytical, and problem-solving skills.
Strong interpersonal, teamwork, and communication skills.
Expected to be highly independent, proactive, and result-oriented to achieve verification goals.
Preferred qualifications:
Knowledge of PMBus, SPI, OTP/MTP, and I2C protocols.
Experience in technically mentoring and coaching junior engineers.
#LI-CC1
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days #J-18808-LjbffrSenior Design Verification Engineer
Inserito 10 giorni fa
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Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
Senior Design Verification Engineer
Oggi
Lavoro visualizzato
Descrizione Del Lavoro
Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
Senior Design Verification Engineer
Inserito 4 giorni fa
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Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
Senior Design Verification Engineer
Oggi
Lavoro visualizzato
Descrizione Del Lavoro
Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
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Senior Design Verification Engineer
Oggi
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Descrizione Del Lavoro
Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
Senior Design Verification Engineer
Oggi
Lavoro visualizzato
Descrizione Del Lavoro
Senior Design Verification Engineer - Rome
I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.
Required Skills & Experience
- Master’s degree in a relevant field.
- Proven experience in 3 successful tapeouts
- Expertise in UVM/System Verilog
- Experience with Formal Verification
- Experience with scripting languages such as Python, Perl or Bash
- Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential
This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome.
Email -
Tel -
Senior Design Verification Engineer
Inserito 2 giorni fa
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I am seeking a highly experienced Senior Verification Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies. Required Skills & Experience Master’s degree in a relevant field. Proven experience in 3 successful tapeouts Expertise in UVM/System Verilog Experience with Formal Verification Experience with scripting languages such as Python, Perl or Bash Knowledge of NoC, PCIe, DDR and other standard peripherals is desirable but not essential This Senior Verification Engineer role offers a unique opportunity to contribute to game-changing semiconductor technology, with the flexibility of a hybrid working model in either Ghent, Barcelona or Rome. Email - Tel -